News

Bull reports results for 2009, posts profit

InsideHPC - Mon, 2010-03-08 16:11

French IT and supercomputing company Bull announced its 2009 results earlier last month (sorry I missed it; it was late to post to Bull’s RSS feed), and the news was basically good with the company pulling in €1.4M in net income on roughly €1B in revenue for 2009.

Didier Lamouche, Bull Chairman and CEO, commented: “In 2009, Bull clearly demonstrated its resilience in a weakened market environment, having recorded a slight increase in revenues for its core business offerings and exceeded its profitability targets.

…”Our priorities for 2009 were to help our customers put in place not only defensive solutions to support cost reduction initiatives, but also proactive solutions that would enable them to innovate and prepare for the end of the economic crisis. The execution of our strategy resulted in a number of significant hosting and outsourcing contracts with new public and private sector customers, as well as by strong growth in our ‘Extreme Computing’ business.

Although they did manage to make money, it was’t much considering gross income, and the company is going to need to look for ways to raise net income if it is going to remain vibrant in the coming years. Looking forward, the company anticipates great potential from its acquisition of Amesys, approved in January of this year

The transaction will enable Bull to create a European leader in large-scale computer processing solutions for critical and high-security systems which combines on the one hand the Amesys group’s know-how in real-time signal processing and, on the other, Bull’s expertise in the processing, analysis and utilization of information as epitomized in high-performance computing (HPC) and storage, as well as the associate infrastructure-related and outsourcing services. The EGM also approved the increase in the Group’s issued share capital in favor of Crescendo Industries, the owner of the Amesys group.

With 750 employees, AMESYS provides engineering, software, and technology solutions for Defence & Aeronautics, Telecommunications, Transportation, Energy & Industry, Network & Security and Microelectronics in Europe and Canada.

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Cray, DOE partner with Australian university building debuggers for large scale

InsideHPC - Mon, 2010-03-08 15:58

Researchers at Australia’s Monash University have attracted the interest of both the Department of Energy and Cray here in the US for new debugger technology that aims to make it easier to spot errors in codes running on very large numbers of processors.

“While traditional debuggers work by comparing program variables with user expectations, our ‘relative’ debugging operates by comparing data in one program with data in another that is known to be correct. So it works by detecting where the codes differ rather than from the principle of how the code should be,” Professor Abramson said.

“The debugging software which we have developed – and which is a commercial application of research we have been conducting for several years – efficiently weeds out glitches in supercomputers through a process that could be described as the technical equivalent of a ’spot the difference’ puzzle.”

Abramson’s team is getting funding from the DOE, and Cray is evaluating how to move the technology to market

The research team, led by the Lab’s Director, Professor David Abramson, recently received funding support from the United States Department of Energy, an agency leading an international supercomputer R&D consortium that includes IBM, and has a commercialisation agreement with supercomputer manufacturing giant Cray.

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Broadcom Invests In Tilera

InsideHPC - Mon, 2010-03-08 15:21

Tilera announced this morning that Broadcom has made a strategic investment in their organization.  Alongside the investment, Tilera has appointed Nariman Yousefi, Senior VP of Infrastructure Technologies at Broadcom, to their board of directors.

We are very pleased to have added Broadcom as a strategic investor,” said Omid Tahernia, Tilera CEO. “Broadcom is a natural partner for Tilera given its leadership position in providing complete system solutions to a common set of end customers, including in the networking, multimedia, and wireless infrastructure end markets.”

Tilera’s multicore processors are redefining the category,” said Rajiv Ramaswami, Executive Vice President & General Manager, Broadcom Enterprise Networking Group. “Tilera offers an innovative multiprocessor approach for scalable performance and breakthrough power efficiency.”

For those not familiar with Tilera’s products, they produce a series of massively multicore processors.  How multicore are they John?  Well, they are rumored to be releasing a chip this year with up to 100 lightweight cores [or tiles as they call them].  Cores are connected via their on-chip network, iMesh. The current generation of TILE64 processors have 64 cores arranged in an 8×8 mesh.  Very cool stuff.

For more info, read their full release here.

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What to read at insideHPC this week

InsideHPC - Fri, 2010-03-05 20:52

Wondering what to read at insideHPC? Some of the most popular posts this week are:

Also, congrats to this week’s book giveaway winner, Ricardo Ferreira. There’ll be another giveaway next week; stay tuned for details.

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Yellow Dog Linux for CUDA released

InsideHPC - Fri, 2010-03-05 16:09

Fixstars announced this week that it has released Yellow Dog Enterprise Linux for CUDA, a version of Linux that the company claims is optimized for computing with NVIDIA’s GPUs.

What’s the deal? It looks like this distro bundles a bunch of tools for writing and running CUDA applications into the box, and works some other magic that the company claims will improve the performance of “some” applications

“Yellow Dog’s advance to the x86 architecture is without a doubt a monumental event for the operating system, which had been known for the past 10 years as the Linux distribution for the Power Architecture,” said Akihiro Asahara, the development director of YDEL at the Fixstars Corporation. “Since our mission is to provide optimal multi-core solutions, it is only natural that we have come to release this product. YDEL for CUDA is an OS built by CUDA developers for CUDA developers.”…

Key benefits of Yellow Dog Enterprise Linux for CUDA:

  • YDEL for CUDA users can experience up to a 9% performance improvement in some applications.
  • Comprehensive support is offered to paid subscriptions with our skilled team able to assist you with both Linux and CUDA.
  • YDEL’s unparalleled integrations means everything you need to write and run CUDA applications is included and configured.
  • YDEL includes multiple versions of CUDA and can easily switch between them via a setting in a configuration file or an environment variable.
  • Never worry about updates affecting your system, Fixstars offers YDEL users greater reliability with our strenuous test procedures that validate GPU computing functionality and performance.

The non-supported version can be had for free for educational use; businesses are required to license the distro for $400/year. More info at the YDEL for CUDA page.

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Customize Chrome for Better Browsing

Linux_mag clusters - Thu, 2010-03-04 22:43
Google Chrome has only had extensions available for a few months, but it already has a great collection of add-ons that will boost your browsing experience. We look at a handful of extensions that let you manage tabs effectively, learn more about the sites you browse, and read feeds with panache.
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Winner: Ricardo Ferreira from Portugal

InsideHPC - Thu, 2010-03-04 20:15

I’ve heard back from the winner, so this contest is offiically over.

The winner of this week’s book giveaway for Kirk and Hwu’s Programming Massively Parallel Processors is Ricardo Ferreira. Ricardo is at the Institudo Pedro Nunes, a non-profit private organization for innovation and technology transfer based in Coimbra, Portugal.

Congratulations, Ricardo!

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Petascale internships with Blue Waters

InsideHPC - Thu, 2010-03-04 19:30

Found via Twitter, news of the call for the National Computational Science Institute’s (NCSI) Undergraduate Petascale Education Program. From the website

The NCSA Blue Waters project, in collaboration with the National Computational Science Institute (NCSI) and national HPC programs, is launching a coordinated effort to prepare current and future generations of students with the computational thinking skills, knowledge and commitment to advance scientific computing through the use of high performance computing (HPC) resources and environments.

…To achieve these goals, the Blue Waters Undergraduate Petascale Education Program (uPEP) is launching three programs for engaging the national community. The three programs are:

  • Undergraduate Materials Development by undergraduate faculty
  • Professional Development Workshops for undergraduate faculty
  • Research Experiences for undergraduates

Information on the various calls as well as applications and instructions can be found at the link above.

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DARPA calls for petaflops-in-a-rack proposals

InsideHPC - Thu, 2010-03-04 18:49

We talked about this back in June of last year when DARPA issued an RFI for its Ubiquitous High Performance Computing program. That RFI was intended to gauge the community’s thinking on how we’d get to a system that was easy to program, computationally efficient, and computed at 50 GLOPS/w. That’s a big jump, considering that the #1 slot on the Green500 in November of 2009 weighed in at only .7 GFLOPS/w.

Here’s a link to the BAA [PDF] for details; here are some of the specs for the effort

  • Cabinet: width < 24 inches; height < 78 inches; and depth < 40 inches
  • 50 GFLOPS/W LINPACK (HPL)14 benchmark
  • Peak Performance of 1 PFLOPS (HPL)
  • Maximum Cabinet Power of 57 kW including: UHPC System, storage system, fans, self contained cooling, high bandwidth I/O, etc.
  • Cooling: Self contained within cabinet. All approaches not requiring external resources are allowable.

Many of the requirements address the usability of the system. For example

The UHPC software effort spans operating systems; runtime systems for scheduling and lower level resource management; memory management; communication; performance monitoring; power management; self-aware operation; and prototype compilers. It is anticipated that a new system software stack will be developed for a UHPC System….

A significant problem is managing parallelism and locality. OS-related challenges include parallel scalability, spatial partitioning of OS and application functionality, direct hardware access for inter-processor communication, and fault isolation. There are additional challenges in runtime systems including scheduling, memory management, communication, performance monitoring, power management, and dependability. All of these must be solved by future ExtremeScale operating systems. The OS should be a self-aware system that “learns” to favorably respond to user goals and adapting to changing goals, resources, models, operating conditions, attacks and failures. Self-aware OS will take active measures to mitigate the effects of attacks and failures, closing exploited vulnerabilities.

They’ve also decided to release respondents from any support for legacy compilers (like C and FORTRAN), and to encourage the development of “revolutionary programming models.” And, unlike DARPA’s HPCS program, there is no requirement that the design have a market

The final UHPC System Designs and supporting technologies developed under this program must have a demonstratable path to future products that could be used within a DoD mission scenario. There is no requirement that a UHPC System Design be based on current economically viable technologies or that the resulting prototype UHPC System become a product.

The document is remarkable in its breadth and scope, and I could keep excerpting for pages. Its well worth a read. One thing I am concerned about though is the very low level of funding, described well by Timothy Prickett Morgan in his article on the BAA at The Register

Interestingly, DARPA is not ponying up the hundreds of millions of dollars you might expect with the UHPC effort. In phase one and two, there are teams that will design UHPC systems and another set of teams that will design the benchmarks and data sets to test the machines. DARPA is allocating $3.25m for the first year of phase one and $5.25m for the second year for the developers; the UHPC testers get $1.75m per year. (Clearly, it is easier to come up with a test than come up with a system design.) In phase two, UHPC developers get $8.65m per year and testers get $2m per year.

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Perlman named Intel Fellow

InsideHPC - Thu, 2010-03-04 18:30

Quick: check your bookshelf. The odds aren’t bad that you have a copy of Radia Perlman’s book, Interconnections — I do, and I’m not even a networking guy.

That book’s author, Radia Perlman, has just been named to Intel’s elite core of Fellows.

“We are pleased to have Radia join the Intel team,” said Justin Rattner, director of Intel Labs and the company’s chief technology officer. “Given the ever-increasing importance of security and the connectedness of the computing continuum, Radia’s expertise and leadership will benefit Intel and Intel Labs as we work to deliver breakthrough technologies and bring the benefits of the digital revolution to people across the globe.”

Intel Fellows represent one of the highest levels of technical achievement within the company. They are selected for their technical leadership and outstanding contributions to the company and the industry.

Perlman was most recently at Sun (where she was also a Fellow), where I met her. Actually, I had lunch with her, and although she has no reason to remember that particular lunch out of so many in her time at Sun, I do remember it very vividly. We were seated next to each other at a table of mostly people who didn’t know one another, and we started talking. She stands out in my mind as one of the nicest, unassuming, engaging people I’ve met in many years. Which is remarkable, considering her technologies make a lot of stuff we depend upon every day work

Perlman is the inventor of many fundamental technology innovations in computer networking, including the spanning tree algorithm, which is at the heart of today’s Ethernet; TRILL, an emerging standard for data center interconnection that can replace today’s spanning tree Ethernet; and scalable and robust link state routing technology that is key to the operation of today’s Internet.

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Anita Borg Institute announces 2010 Women of Vision winners

InsideHPC - Thu, 2010-03-04 18:28

No, this is not off topic. Increasing the use of HPC increases the quality of life for everyone on the planet through new technology and research projects. Increasing use means making HPC more directly relevant to more people, and that involves solving really hard problems. You can’t solve really hard problems without really smart people, and in computing we typically draw our talent from the less-than-half male portion of the population.

So it’s good news that the Anita Borg Institute has announced its roster of Women of Vision award winners for 2010

The Anita Borg Institute for Women and Technology (ABI) announced today the winners of this year’s Anita Borg Women of Vision Awards. Three leaders in technology – Kristina M. Johnson, Under Secretary for Energy, Department of Energy, Kathleen R. McKeown, Henry and Gertrude Rothschild Professor of Computer Science, Columbia University, and Lila Ibrahim, General Manager, Emerging Markets Platform Group, Intel Corporation will be honored for their accomplishments and contributions as women in technology at ABI’s fifth annual Women of Vision Awards Banquet at the Mission City Ballroom, Santa Clara, California on May 12, 2010.

The award honors women making significant contributions to technology in the categories of innovation, leadership, and social impact.

“The 2010 Women of Vision Award Winners have made significant contributions to important technologies including renewable energy, human machine interaction and education technology platforms,” said ABI CEO and President, Dr. Telle Whitney. “These women are role models for technical women everywhere.”

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GT creates new institute for data, HPC research

InsideHPC - Thu, 2010-03-04 18:00

Georgia Tech’s College of Computing announced this week that it is launching a new institute to serve as the center of gravity for the universities large scale computing research

“As we look to high performance computing to drive advanced breakthroughs in science, health, energy and other industries, leveraging Georgia Tech’s strongest assets – world class researchers in computing, experts across nearly every problem domain, and low barriers to collaboration – is what will set us apart,” said Dr. Mark Allen, Senior Vice Provost for Research and Innovation at Georgia Tech. “The creation of the Institute for Data and High Performance Computing provides the organizational foundation to harness our strategic capabilities and attack the most challenging problems that face society today.”

…The institute’s interim director will be Dr. Richard Fujimoto, Regents’ Professor and head of Computational Science & Engineering in the College of Computing. One important objective for Dr. Fujimoto will be to focus on developing new innovations in computational methods into useable tools and software to advance research in the application domain. Creating computational artifacts that provide value to application researchers and can be exported beyond the Tech campus provides a critical avenue to maximize the impact of Georgia Tech research innovations.

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NCSA prepares to deploy new SGI shared memory system

InsideHPC - Thu, 2010-03-04 17:35

NCSA announced this week that it is making ready to deploy a new 16 TFLOPS SGI Altix UV (the x86-based successor to the company’s Itanium-based shared memory Altix platform) on the National Science Foundation’s TeraGrid

“There has been a clear increase in the demand for shared memory resources,” said TeraGrid Forum chairman John Towns, whose persistent infrastructure team at NCSA will deploy and support Ember. “Allocation requests for shared-memory systems have consistently exceeded the available resources—by as much sevenfold in a recent review of requests—and have been followed by a series of results highlighted in TeraGrid publications. We know Ember will be an essential tool for science and engineering research.”

…Ember will be composed of SGI Altix UV systems with a total of 1,536 processor cores and 8 TB of memory. The system will have 170 TB of storage with 13.5 GB/s I/O bandwidth. Ember will be configured to run applications with moderate to high levels of parallelism (16-384 processors).

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Kirk and Hwu giveaway over, 29 countries represented

InsideHPC - Thu, 2010-03-04 17:13

The giveaway is over, and I want to thank all of you who send in email entries. The response was tremendous, with nearly 400 people mailing in and “raising their hand” for the book. One thing that was unexpected: just how international the entries were. We had entries from at 29 countries just going by country extensions and snail mail addresses in .sigs (sorry, I’m not counting Texas as a separate country), but many of you use Gmail so there could have been even more countries represented. Serbia, Greece, and Pakistan surprised me, and I was also surprised at how many submissions we had from Spain and France — hola and bonjour to our readers in those countries.

I have sent an email off to the winner, and as soon as he acknowledges it I’ll post his name and get the book out to him. If I haven’t heard back by the weekend, we’ll go on to an alternate selection.

If you didn’t win this time, fret not friends! I have a stack of a dozen books to review, and a commitment to get through them in the next 4 months, so there will be many more giveaways to come.

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What Would You Do with 48 Cores?

InsideHPC - Thu, 2010-03-04 04:41

AMD wants to know.  How bad?  Bad enough to announce a contest.  [and we all know how much we love contests].  The folks at AMD are seeking your best essays, videos or blogs documenting how you might use 48 cores.  What will you win?  Well, 48 cores [including:]…

  • Four new AMD Opteron™ processors Model 6174, 12-core (2.2 GHz)
  • TYAN S8812 motherboard: the motherboard is a Tyan S8812 that features 4 processor sockets with the capacity for you to install up to 8 DIMMs per socket
  • one copy of Windows Server® 2008

Ooooooo! Gear!

For those of you living under a rock – or working away in the depths of the data center – the AMD Opteron 6100 series processors are 8- and 12-core processors that feature an incredible four channels of DDR-3 memory.  That’s 33% more channels than expected competing Intel products* and more than double the memory throughput of our existing products.** These are the first 8- and 12-core x86 processors in the market and you could be one of the first to have such a historic product in your hands.

If you’re interested in entering, check out the contest and submission details here.

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Russia Investing In Supercomputing Development

InsideHPC - Thu, 2010-03-04 04:29

According to an article today at The Register, Russia’s leaders are investing heavily in supercomputing technology.  The post cites the APA saying that Vladimir Putin has allocated $37million to develop supercomputing technologies in Russia.

Russia launched its fastest supercomputer, Lomonosov, at the Moscow State University’s Research Computing Center in 2004. With the peak speed of 420TFLOPS, it is still ranked 12th in the Top500 list of the world’s fastest computers.

The article doesn’t cite any concrete reasoning why Putin and Russia have earmarked funds for supercomputing development.  However, Russia has made it clear in the past decade that they are striving to become a modern, industrialized nation that operates with similar GDP distributions as European and Western nations.

For more info, check out the original article on The Register here.

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SGI Names Internal Talent to Top Engineering Posts

InsideHPC - Thu, 2010-03-04 04:22

SGI today announced two new additions to their executive engineering staff.  The new additions were actually promotions from within.  Rick Chapek was named senior vice president of hardware engineering and Christian Tanasescu was named vice president of software engineering, effective immediately.  Rick will be responsible for key hardware development and engineering deliverables across SGI product families including high-performance computing (HPC), servers, storage and data center computing solutions.  Christian will be responsible for system software and middleware development, independent software vendors (ISVs) relationships, applications benchmarking and SGI’s cloud computing solution, Cyclone(TM).  They have been with the company since 1996 and 1992, respectively.

SGI solutions are at the forefront of performance, scale and efficiency,” said Mark J. Barrenechea, SGI CEO. “With Rick and Christian’s proven technical capabilities, experience and leadership, they will help SGI deliver even stronger products to our customers.”

Congrats to Rick and Christian on their recent promotions.  For more info, read the full release here.

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Panasas Receives Product Innovation Award

InsideHPC - Thu, 2010-03-04 04:17

Panasas announced today that Network Product Guide named their ActivStor Series 9 a winner of the 2010 Product Innovation Awards.  This annually venerated award recognizes and honors vendors with innovative and ground-breaking products that are bringing essential and incremental changes while setting the bar higher for others in all areas of information technology.

Innovation is not just about new products alone,” says Rake Narang, editor-in-chief at Network Products Guide. “To succeed, companies need to see innovation not as a one-time errand, but as something that has to be continuously evolved and improved upon over and over again. This requires putting greater focus on customer needs and making innovation the center of a company’s way of developing better solutions. Innovative products such as Panasas ActiveStor Series 9 are bringing improvements in cost-effective storage solutions.”

For more info, check out their release here or the full awards list here.

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Penguin Computing Names CFO

InsideHPC - Thu, 2010-03-04 04:12

Penguin Computing has announced that they have hired George Olivia to the executive management team as chief financial officer [CFO]

George is a seasoned financial executive with extensive experience in high-growth startups as well as billion-dollar technology companies,” said Charles Wuischpard, CEO at Penguin Computing. “We are thrilled that he has joined Penguin to help us maintain a strong financial position as we expand into new markets with our turnkey HPC solutions.”

Mr. Conner brings over 25 years of startup experience to Penguin.  He was most recently CFO of Pandigital, a leading digital photo frame supplier. Mr. Oliva also served as CFO of StorCard and Hammer Storage Solutions. He was also director of finance and corporate controller at Lightwave Microsystems Corporation. Previously, Mr. Oliva served as corporate controller at Conner Technology, where he was responsible for corporate planning and analysis as well as providing financial support to the world-wide manufacturing and sales organizations.

Penguin continues to leverage its deep expertise in high performance computing to deliver innovative solutions to the market,” said Oliva. “For example, the company recently launched ‘Penguin on Demand’, a new service that delivers a complete HPC solution in the cloud for organizations looking or HPC capabilities without the expense and effort required to acquire HPC clusters. I’m looking forward to working with the Penguin management team to take the company to the next level.”

For more info, read their full release here.

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The Three Giants of Linux

Linux_mag clusters - Thu, 2010-03-04 00:11
In the land of Linux, there are three giants. Three distributions which have stood the test of time and from which most others have come. What makes these three unique and how have they shaped Linux as we know it today?
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